31-bit

In computer architecture, 31-bit integers, memory addresses, or other data units are those that are 31 bits wide.

In 1983, IBM introduced 31-bit addressing in the System/370-XA mainframe architecture as an upgrade to the 24-bit physical and virtual,[1] and transitional 24-bit-virtual/26-bit physical,[2][3] addressing of earlier models.[4][5] This enhancement allowed address spaces to be 128 times larger, permitting programs to address memory above 16 MB (referred to as "above the line").[6][1] Support for COBOL, FORTRAN and later on Linux/390 were included.

Architecture

In the System/360, other than the 360/67, and early System/370 architectures, the general purpose registers were 32 bits wide, the machine did 32-bit arithmetic operations, and addresses were always stored in 32-bit words, so the architecture was considered 32-bit, but the machines ignored the top 8 bits of the address resulting in 24-bit addressing. With the XA extension, only the high order bit (bit 0) in the word was ignored for addressing. An exception is that mode-switching instructions also used bit 0. There were at least two reasons that IBM did not implement the 32-bit addressing of the 360/67

  1. The loop control instructions BXH and BXLE did signed comparisons.
  2. Much of the existing software used bit 0 as an end-of-list indicator.[7]

Transition

The transition was tricky: assembly language programmers, including IBM's own operating systems architects and developers, had been using the spare byte at the top of addresses for flags for almost twenty years.[8] IBM chose to provide two forms of addressing to minimize the pain: if the most significant bit (bit 0) of a 32-bit address was on, the next 31 bits were interpreted as the virtual address. If the most significant bit was off, then only the lower 24 bits were treated as the virtual address (just as with pre-XA systems). Thus programs could continue using the seven low-order bits of the top byte for other purposes as long as they left the top bit off. The only programs requiring modification were those that set the top (leftmost) bit of a word containing an address. This also affected address comparisons: The leftmost bit of a word is also interpreted as a sign-bit in 2's complement arithmetic, indicating a negative number if bit 0 is on. Programs that use signed arithmetic comparison instructions could get reversed results. Two equivalent addresses could be compared as non-equal if one of them had the sign bit turned on even if the remaining bits were identical. Most of this was invisible to programmers using high-level languages like COBOL[9] or FORTRAN,[3][10] and IBM aided the transition with dual mode hardware for a period of time.

Certain machine instructions in this 31-bit addressing mode alter the addressing mode bit as a possibly intentional side effect. For example, the original subroutine call instructions BAL, Branch and Link, and its register-register equivalent, BALR, Branch and Link Register, store certain status information, the instruction length code,[11] the condition code and the program mask, in the top byte of the return address. A BAS, Branch and Store, instruction was added to allow 31-bit return addresses. BAS, and its register-register equivalent, BASR, Branch and Store Register, was part of the instruction set of the System/360 Model 67, which was the only System/360 model to allow addresses longer than 24 bits. These instructions were maintained, but were modified and extended for 31-bit addressing.

Additional instructions in support of 24/31-bit addressing include two new register-register call/return instructions which also effect an addressing mode change (e.g. Branch and Save and Set Mode, BASSM,[12] the 24/31 bit version of a call where the linkage address including the mode is saved and a branch is taken to an address in a possibly different mode, and BSM, Branch and Set Mode, the 24/31 bit version of a return, where the return is directly to the previously saved linkage address and in its previous mode). Taken together, BASSM and BSM allow 24-bit calls to 31-bit (and return to 24-bit), 31-bit calls to 24-bit (and return to 31-bit), 24-bit calls to 24-bit (and return to 24-bit) and 31-bit calls to 31-bit (and return to 31-bit).

Like BALR 14,15 (the 24-bit-only form of a call), BASSM is used as BASSM 14,15, where the linkage address and mode are saved in register 14, and a branch is taken to the subroutine address and mode specified in register 15. Somewhat similarly to BCR 15,14 (the 24-bit-only form of an unconditional return), BSM is used as BSM 0,14, where 0 indicates that the current mode is not saved (the program is leaving the subroutine, anyway), and a return to the caller at the address and mode specified in register 14 is to be taken. Refer to IBM publication MVS/Extended Architecture System Programming Library: 31-Bit Addressing, GC28-1158-1, for extensive examples of the use of BAS, BASR, BASSM and BSM, in particular, pp. 29–30.

370/ESA architecture

In the 1990s IBM introduced 370/ESA architecture (later named 390/ESA and finally ESA/390 or System/390, in short S/390), completing the evolution to full 31-bit virtual addressing and keeping this addressing mode flag. These later architectures allow more than 2 GB of physical memory and allow multiple concurrent address spaces up to 2 GB each in size. As of mid-2006 there were too many programs unduly constrained by this multiple 31-bit addressing mode.

z/Architecture

IBM broke the 2 GB linear addressing barrier ("the bar") in 2000 with the introduction of the first 64-bit z/Architecture system, the IBM zSeries Model 900.[1][13] Unlike the XA transition, z/Architecture does not reserve a top bit to identify earlier code. z/Architecture maintains compatibility with 24-bit and 31-bit code, even older code running concurrently with newer 64-bit code.

Linux/390

Since Linux/390 was first released for the existing 32-bit data/31-bit addressing hardware in 1999, initial mainframe Linux applications compiled in pre-z/Architecture mode are also limited to 31-bit addressing. This limitation disappeared with 64-bit hardware, 64-bit Linux on z Systems, and 64-bit Linux applications. The 64-bit Linux distributions still run 32-bit data/31-bit addressing programs. IBM's 31-bit addressing allows 31-bit code to make use of additional memory. However, at any one instant, a maximum of 2 GB is in each working address space. For non-64-bit Linux on processors with 31-bit addressing, it is possible to assign memory above the 2 GB bar as a RAM disk. 31-bit Linux kernel (not user-space) support was removed in version 4.1.[14]

References

  1. ^ a b c "A brief history of virtual storage and 64-bit addressability".
  2. ^ "with transitional support for 26-bit"
  3. ^ a b KE Plambeck (2002). "Development and attributes of z/Architecture"" (PDF).
  4. ^ Robert T. Fertig (May 1983). "XA: The View From The Trenches (pp.122-136)". Datamation.
  5. ^ Ronald L. Bond (May 1983). "XA: The View From White Plains (pp.139-152)". Datamation.
  6. ^ "...to run in the 31-bit area above the line,... "Rewriting to run in 31 bit area". Computerworld. October 27, 1986. p. 13.
  7. ^ "... the high order bit in the last fullword must be set to one to indicate the end of the list." "WAIT — Wait for one or more events".
  8. ^ Indeed, in a variable length parameter list of addresses, the last address entry traditionally had its most significant bit set to 1, whereas the other address entries were required to have their most significant bit set to 0.
  9. ^ "VS Cobol II compiles Cobol programs in 31-bit".
  10. ^ "to accommodate large arrays in FORTRAN."
  11. ^ Because the instruction length code is 00b for a BALR and is 01b for a BAL, the high order bit is always guaranteed to be set to 0, thereby indicating 24-bit mode, for BALR and BAL on XA and later systems.
  12. ^ "BASSM (branch and save and set mode)" "Using the BASSM and BSM instructions".
  13. ^ "2-gigabyte address from the user private area is called the bar" "Introduction to the New Mainframe: z/OS Basics" (PDF).
  14. ^ "4.1 Merge window, part 1". LWN. April 15, 2015.
26-bit

In computer architecture, 26-bit integers, memory addresses, or other data units are those that are 26 bits wide, and thus can represent values up to 64 mega (base 2). Two examples of computer processors that featured 26-bit memory addressing are certain second generation IBM System/370 mainframe computer models introduced in 1981 (and several subsequent models), which had 26-bit physical addresses but had only the same 24-bit virtual addresses as earlier models, and the first generations of ARM processors.

32-bit

In computer architecture, 32-bit integers, memory addresses, or other data units are those that are 32 bits (4 octets) wide. Also, 32-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 32-bit microcomputers are computers in which 32-bit microprocessors are the norm.

Amdahl Corporation

Amdahl Corporation was an information technology company which specialized in IBM mainframe-compatible computer products, some of which were regarded as supercomputers competing with those from Cray Research. Founded in 1970 by Gene Amdahl, a former IBM computer engineer best known as chief architect of System/360, it has been a wholly owned subsidiary of Fujitsu since 1997. The company is located in Sunnyvale, California.

From its first machine in 1975, Amdahl's business was to provide mainframe computers that were plug-compatible with contemporary IBM mainframes, but offering higher reliability, running somewhat faster, and costing somewhat less. They often had additional practical advantages as well, in terms of size, power requirements, or being air-cooled instead of requiring a chilled water supply. This offered a price/performance ratio superior to the IBM lineup, and made Amdahl one of the few real competitors to "Big Blue" in the very high-margin computer market segment. The company won about 8% of the mainframe business worldwide, but was a market leader in some regions, most notably in the Carolinas. Proverbially, savvy IBM customers liked to have Amdahl coffee mugs visible in their offices when IBM salespeople came to visit.

As the mainframe market began to change in the later 1980s, Amdahl was increasingly diversified, becoming a major supplier of UNIX and open systems software and servers, data storage subsystems, data communications products, application development software, and a variety of educational and consulting services.

DOS/360 and successors

Disk Operating System/360, also DOS/360, or simply DOS, is a discontinued operating system for IBM mainframes. It was announced by IBM on the last day of 1964, and it was first delivered in June 1966. In its time, DOS/360 was the most widely used operating system in the world.

Field (computer science)

In computer science, data that has several parts, known as a record, can be divided into fields. Relational databases arrange data as sets of database records, also called rows. Each record consists of several fields; the fields of all records form the columns.

Examples of fields: name, gender, hair colour.

In object-oriented programming, field (also called data member or member variable) is the data encapsulated within a class or object. In the case of a regular field (also called instance variable), for each instance of the object there is an instance variable: for example, an Employee class has a Name field and there is one distinct name per employee. A static field (also called class variable) is one variable, which is shared by all instances. Fields are abstracted by properties, which allow them to be read and written as if they were fields, but these can be translated to getter and setter method calls.

IBM Multiprise 3000

As of late 2006, IBM's Multiprise 3000, product number 7060, is physically the smallest mainframe, introduced in 1999 and still in common use (HxWxD are 82 x 52 x 111 cm). Models H50 and H70 were withdrawn from marketing in 2002. It uses a similar case as the S/390 Integrated Server, which was introduced about one year earlier. The Multiprise 3000 is unusual because it contains internal disk storage. Withdrawal of service for all models occurred at the end of 2012.The Multiprise 3000 is popular among smaller mainframe customers, particularly those running the 31-bit z/VSE V3R1 operating system. Initially supported OSes were OS/390 V2R4 through R8, VM/ESA V2R2 through R4, and VSE/ESA V2R2 through R4. (The 31-bit versions of TPF/ESA and VM/CMS are also compatible.) The 3000 supports subsequent OS releases, including all z/OS releases up to and including V1R5. However, the Multiprise 3000 is rapidly losing popularity among z/OS and Linux on z Systems users because it does not support z/Architecture. Multiprise 3000 users are upgrading to 64-bit models, especially the System z9 BC, to run newer software such as DB2 Version 8 for z/OS. That trend has accelerated as of late 2006 given reported U.S. prices as low as $30,000 for used 64-bit z800 models and about $100,000+ for new System z9 BCs.IBM has announced that z/VSE V4R1, due at the end of 2006, will require a z/Architecture system. This announcement may accelerate retirements of 3000s given the system's popularity with VSE users.

The Multiprise 3000 supports ESCON and a limited number of network adapters for external I/O. There are three models available (7060-H30, -H50, -H70), that differ in the capacity and throughput and, thus, software license costs. Both H30/H50 have one main processor with 1GB/2GB of memory while the H70 model has two main processors with 4GB of memory. All models also have one System Assistance Processor (SAP). The main processors are the same CMOS chips used in the G5 series of IBM 9672, the flagship S/390 systems.

IBM also produced a 7060-H55 which was built on the 9672-R16 platform and a 7060-H75 which was built on the 9672-R26 platform. These machines are sometimes referred to as "the secret 7060". The 7060-H55 and 7060-H75 had OSA network adapter capabilities which allowed the network to talk across multiple LPARs. The 7060-H30, H50 and H70 were not OSA capable and would require one network adapter per LPAR with a limit of four.

IBM System/370

The IBM System/370 (S/370) was a model range of IBM mainframe computers announced on June 30, 1970 as the successors to the System/360 family. The series mostly maintained backward compatibility with the S/360, allowing an easy migration path for customers; this, plus improved performance, were the dominant themes of the product announcement. In September 1990, the System/370 line was replaced with the System/390.

IBM System/390

The IBM Enterprise System/390 was the third generation of the System/360 instruction set architecture. The first ESA/390 computer was the Enterprise System/9000 (ES/9000) family, which were introduced in 1990. These were followed by the CMOS System/390 mainframe family in the mid-1990s. These systems followed the IBM 3090, with over a decade of follow-ons. The ESA/390 was succeeded by the 64-bit z/Architecture in 2000.

IBM Z

IBM Z is a family name used by IBM for all of its non-POWER mainframe computers from the Z900 on.

In July 2017, with another generation of products, the official family was changed to IBM Z from IBM z Systems; the IBM Z family now includes the newest model the IBM z14, as well as the z13 (released under the IBM z Systems/IBM System z names), the IBM zEnterprise models (in common use the zEC12 and z196), the IBM System z10 models (in common use the z10 EC), the IBM System z9 models (in common use the z9EC) and IBM eServer zSeries models (in common use refers only to the z900 and z990 generations of mainframe).

IBM z13 (microprocessor)

The z13 is a microprocessor made by IBM for their z13 mainframe computers, announced on January 14, 2015. Manufactured at GlobalFoundries' East Fishkill, New York fabrication plant (formerly IBM's own plant). IBM stated that it is the world's fastest microprocessor and is about 10% faster than its predecessor the zEC12 in general single-threaded computing, but significantly more when doing specialized tasks.The IBM z13 is the last z Systems server to support running an operating system in ESA/390 architecture mode. However, all 24-bit and 31-bit problem-state application programs originally written to run on the ESA/390 architecture are unaffected by this change.

Linux on z Systems

Linux on IBM Z (or Linux on z for short, and previously Linux on z Systems) is the collective term for the Linux operating system compiled to run on IBM mainframes, especially IBM Z and IBM LinuxONE servers. Similar terms which imply the same meaning are Linux on zEnterprise, Linux on zSeries, Linux/390, Linux/390x, etc. The terms zLinux or z/Linux are also sometimes used, but these terms are discouraged by IBM as they create the implication of an IBM-offered or IBM-distributed version of Linux, which is incorrect. (Further, "zLinux" without the slash is also incorrect, as it's software, and software takes a slash: z/VM, z/OS, z/VSE, etc.; hardware does not: z900, z13, etc.)

List of operating systems

This is a list of operating systems. Computer operating systems can be categorized by technology, ownership, licensing, working state, usage, and by many other characteristics. In practice, many of these groupings may overlap. Criteria for inclusion is notability, as shown either through an existing Wikipedia article or citation to a reliable source.

MVS

Multiple Virtual Storage, more commonly called MVS, was the most commonly used operating system on the System/370 and System/390 IBM mainframe computers. It was developed by IBM, but is unrelated to IBM's other mainframe operating systems, e.g., VSE, VM, TPF.

First released in 1974, MVS was extended by program products with new names multiple times:

first to MVS/SE (MVS/System Extensions),

next to MVS/SP (MVS/System Product) Version 1,

next to MVS/XA (MVS/eXtended Architecture),

next to MVS/ESA (MVS/Enterprise Systems Architecture),

then to OS/390 and

finally to z/OS (when 64-bit support was added with the zSeries models). IBM added UNIX support (originally called OpenEdition MVS) in MVS/SP V4.3 and has obtained POSIX and UNIX™ certifications at several different levels from IEEE, X/Open and The Open Group. The MVS core remains fundamentally the same operating system. By design, programs written for MVS run on z/OS without modification.At first IBM described MVS as simply a new release of OS/VS2, but it was, in fact a major rewrite. OS/VS2 release 1 was an upgrade of OS/360 MVT that retained most of the original code and, like MVT, was mainly written in assembly language. The MVS core was almost entirely written in Assembler XF, although a few modules were written in PL/S, but not the performance-sensitive ones, in particular not the Input/Output Supervisor (IOS). IBM's use of "OS/VS2" emphasized upwards compatibility: application programs that ran under MVT did not even need recompiling to run under MVS. The same Job Control Language files could be used unchanged; utilities and other non-core facilities like TSO ran unchanged. IBM and users almost unanimously called the new system MVS from the start, and IBM continued to use the term MVS in the naming of later major versions such as MVS/XA.

Program status word

The program status word (PSW) is an IBM System/360 architecture and successors control register which performs the function of a status register and program counter in other architectures, and more.

Although certain fields within the PSW may be tested or set by using non-privileged instructions, testing or setting the remaining fields may only be accomplished by using privileged instructions.

Contained within the PSW are the two bit condition code, representing zero, positive, negative, overflow, and similar flags of other architectures' status registers. Conditional branch instructions test this encoded as a four bit value, with each bit representing a test of one of the four condition code values, 23 + 22 + 21 + 20. (Since IBM uses big-endian bit numbering, mask value 8 selects code 0, mask value 4 selects code 1, mask value 2 selects code 2, and mask value 1 selects code 3.)

The 64-bit PSW describes (among other things)

Interrupt masks

Privilege states

Condition code

Instruction addressIn the early instances of the architecture (System/360 and early System/370), the instruction address was 24 bits; in later instances (XA/370), the instruction address was 31 bits plus a mode bit (24 bit addressing mode if zero; 31 bit addressing mode if one) for a total of 32 bits.

In the present instances of the architecture (z/Architecture), the instruction address is 64 bits and the PSW itself is 128 bits.

The PSW may be loaded by the LOAD PSW instruction (LPSW or LPSWE). Its contents may be examined with the Extract PSW instruction (EPSW).

STL (file format)

STL (an abbreviation of "stereolithography") is a file format native to the stereolithography CAD software created by 3D Systems. STL has several after-the-fact backronyms such as "Standard Triangle Language" and "Standard Tessellation Language". This file format is supported by many other software packages; it is widely used for rapid prototyping, 3D printing and computer-aided manufacturing. STL files describe only the surface geometry of a three-dimensional object without any representation of color, texture or other common CAD model attributes. The STL format specifies both ASCII and binary representations. Binary files are more common, since they are more compact.An STL file describes a raw, unstructured triangulated surface by the unit normal and vertices (ordered by the right-hand rule) of the triangles using a three-dimensional Cartesian coordinate system. In the original specification, all STL coordinates were required to be positive numbers, but this restriction is no longer enforced and negative coordinates are commonly encountered in STL files today. STL files contain no scale information, and the units are arbitrary.

Subnetwork

A subnetwork or subnet is a logical subdivision of an IP network. The practice of dividing a network into two or more networks is called subnetting.

Computers that belong to a subnet are addressed with an identical most-significant bit-group in their IP addresses. This results in the logical division of an IP address into two fields, the network number or routing prefix and the rest field or host identifier. The rest field is an identifier for a specific host or network interface.

The routing prefix may be expressed in Classless Inter-Domain Routing (CIDR) notation written as the first address of a network, followed by a slash character (/), and ending with the bit-length of the prefix. For example, 198.51.100.0/24 is the prefix of the Internet Protocol version 4 network starting at the given address, having 24 bits allocated for the network prefix, and the remaining 8 bits reserved for host addressing. Addresses in the range 198.51.100.0 to 198.51.100.255 belong to this subnet. The IPv6 address specification 2001:db8::/32 is a large address block with 296 addresses, having a 32-bit routing prefix.

For IPv4, a network may also be characterized by its subnet mask or netmask, which is the bitmask that when applied by a bitwise AND operation to any IP address in the network, yields the routing prefix. Subnet masks are also expressed in dot-decimal notation like an address. For example, 255.255.255.0 is the subnet mask for the prefix 198.51.100.0/24.

Traffic is exchanged between subnetworks through routers when the routing prefixes of the source address and the destination address differ. A router serves as a logical or physical boundary between the subnets.

The benefits of subnetting an existing network vary with each deployment scenario. In the address allocation architecture of the Internet using CIDR and in large organizations, it is necessary to allocate address space efficiently. Subnetting may also enhance routing efficiency, or have advantages in network management when subnetworks are administratively controlled by different entities in a larger organization. Subnets may be arranged logically in a hierarchical architecture, partitioning an organization's network address space into a tree-like routing structure.

VSE (operating system)

z/VSE (Virtual Storage Extended) is an operating system for IBM mainframe computers, the latest one in the DOS/360 lineage, which originated in 1965. Announced Feb. 1, 2005 by IBM as successor to VSA/ESA 2.7, then-new z/VSEwas named to reflect the new "System z" branding for IBM's mainframe product line.It is less common than prominent z/OS and is mostly used on smaller machines.

Z/Architecture

z/Architecture, initially and briefly called ESA Modal Extensions (ESAME), is IBM's 64-bit instruction set architecture implemented by its mainframe computers. IBM introduced its first z/Architecture-based system, the z900, in late 2000. Later z/Architecture systems include the IBM z800, z990, z890, System z9, System z10, zEnterprise 196, zEnterprise 114, zEC12, zBC12, z13, and z14.

z/Architecture retains backward compatibility with previous 32-bit-data/31-bit-addressing architecture ESA/390 and its predecessors all the way back to the 32-bit-data/24-bit-addressing System/360. The IBM z13 is the last z Systems server to support running an operating system in ESA/390 architecture mode. However, all 24-bit and 31-bit problem-state application programs originally written to run on the ESA/390 architecture will be unaffected by this change.

Each z/OS address space, called a 64-bit address space, is 16 exabytes in size. A z/OS address space is 8 billion times the size of the former 2-gigabyte address space.

Z/OS

z/OS is a 64-bit operating system for IBM mainframes, produced by IBM. It derives from and is the successor to OS/390, which in turn followed a string of MVS versions. Like OS/390, z/OS combines a number of formerly separate, related products, some of which are still optional. z/OS offers the attributes of modern operating systems but also retains much of the functionality originating in the 1960s and each subsequent decade that is still found in daily use (backward compatibility is one of z/OS's central design philosophies). z/OS was first introduced in October 2000.

Models
Architecture
Instruction set
architectures
Execution
Parallelism
Processor
performance
Types
Word size
Core count
Components
Power
management
Related

This page is based on a Wikipedia article written by authors (here).
Text is available under the CC BY-SA 3.0 license; additional terms may apply.
Images, videos and audio are available under their respective licenses.